1. Course Details

  • Level: III
  • Prerequisite: CCEE 2212 Microprocessors
  • Lecture Times:  M T W TH 8:00 a.m. - 9:30 a.m.
  • Room: Lab
  • Office Hours M T W TH 9:30 a.m. - 11:00 a.m.
  • Student Study Hours Per Week: 13.5
  • Contact Hours Per Week: 4.5
  • Private Study Hours Per Week: 9
  • AY / Semester:  2004 – 2005 / Summer
  • Professor:  Dr. I. Damaj
  • Contact Details: damajiw@hariricanadian.edu.lb
  • Professor's Website: http://www.idamaj.net
  • Summary of Assessment Method:  Midterm, Assignments, Project, and a Final
  • Software Packages: Altera Max+II, VHDLSimili, Xilinx ISE 4.2i.
  • Hardware Packages: DSP chips
  • Textbook: Embedded System Design: A Unified Hardware/Software Introduction, Frank Vahid and Tony Givargis John Wiley & Sons; ISBN: 0471386782. Copyright (c) 2002.
  • Reference: Logic and Computer Design Fundamentals, 3rd edition updated, M. Morris Mano and Charles R. Kime, Prentice Hall, 2004.

2. Aims of the Course:

Embedded computing systems have grown tremendously in recent years, not only in their popularity, but also in their complexity. This complexity demands a new type of designer that can easily cross the border between hardware design and software design. This course aims to portray hardware and software not as different domains, but rather as two implementation options along continuum of options varying in their design metrics, like cost, performance, power, size, and flexibility. Three important trends have made such a unified view possible. First, the availability of large ICs enabled the integration of a software processor and custom hardware on a single chip. Second, the availability of high quality compilers that aid embedded systems design. Finally, modern synthesis technology that become a commonplace in the design of digital hardware.

3. Short Description:

This course is of 8 chapters divided into 8 weeks. The student should be aware of the importance of revising the material synchronously with the lectures. The assessment is done by a midterm (week 6), assignments, mini project, and a final exam.

Details Topic Chapter No. Assessment
Weeks 1 - 2 Embedded systems overview 1
Week 2 Custom Single-purpose processors: Hardware 2
Week 3 General-purpose processors: Software 3
Week 4 Standard single-purpose processors: Peripherals 4
Week 5 Memory 5
Weeks 6 - 7 Interfacing 6 Midterm (Week 6)
Week 8 Digital camera example (Project Support Slides) 7 Term Project

5. Assessment of the Course

Midterm 25%
Assignments 20%
Project 20%
Final 35%
Assignment Due Date
Assignment I Monday, June 13th, 2005 at 10:00 a.m.
Assignment II Monday, June 20th, 2005 at 10:00 a.m.
Assignment III Thursday, June 30th, 2005 at 10:00 a.m.

[June 27, 2005] The final exam is on Thursday, July 7th 2005 (9:00 a.m. - 11:00 a.m.). The chapters included are: 1, 2, 3, 4, 5, and 6.

[June 27, 2005] The Project material has been posted. (Supporting Slides)

[June 27, 2005] Useful Link: (VHDL Tutorial: Learn by Example -- by Weijun Zhang)

[June 27, 2005] Assignment III has been posted.

[June 13, 2005] Assignment II has been posted.

[June 12, 2005] The midterm exam is scheduled on Thursday, June 23rd 2005 at 8:00 a.m. The chapters included are: 1, 2, 3, and 4.

[June 6, 2005] Assignment I has been posted.

[June 6, 2005] The office hours are scheduled on M T W TH (9:30 a.m. - 11:00 a.m.).

[May 30, 2005] Please note that VHDL Simili from Symphony EDA supports more libraries than the other packages. You might still want to use the other packages in case it happened that your code is compiling with no errors.

[May 18, 2005] The required section from the textbook Logic and Computer Design Fundamentals are 3-3, 3-4, 4-7, 5-7, 6-7, 7-4, 7-10, and 8-5; these should be completed by May 26th. (Download samples)

[May 16, 2005] If you want to use VHDLSimili from Symphony EDA, from the Symphony EDA Licensing Wizard (Start -> All Programs -> Symphony EDA -> VHDL Simili 2.3 -> License Management) you should activate your free license online. Please note that after installing the package, you must replace the file: symphony.lic, in the directory: C:\Program Files\Symphony EDA\VHDL Simili 2.3\Bin with the file: freelic.txt. In other words, delete the existing symphony.lic, and rename freelic.txt to symphony.lic; make sure the new file is not called symphony.lic.txt!

[May 16, 2005] Peter J. Ashenden, VHDL Tutorial, Elsevier Science, 2004.

[May 15, 2005]Every student should install QUARTUS+II from Altera (www.altera.com), VHDLSimili (From Symphony EDA), and Xilinx ISE 4.2i (Available with the book:Logic and Computer Design Fundamentals, 3rd edition updated, M. Morris Mano and Charles R. Kime, Prentice Hall, 2004).