This course covers the organization of modern computer systems. In addition to learning how to program computers at the assembly level, students learn how to design the main components of a von Neumann computer system, including its instruction set architecture, datapath, control unit, memory system, input/output interfaces, and system buses. To consolidate the material presented in class, students work on assembly-language programming and datapath design assignments, and a major computer interfacing project.
A course on the organization of modern computer systems. Basic hardware and software components of von Neumann computers. Machine instruction sets and assembly language programming. Fixed- and floating-point computer arithmetic. Processor datapath and control unit design. Instruction pipelining. The memory system. Input/output interfacing techniques. System buses.
Details | Topic | Chapter No. | Assessment |
---|---|---|---|
Week 1 - 2 | Computer Abstractions: Basic Organization of Computer Systems (ISA, Datapath, Control, Memory, I/O, Operating Systems, Compilers, Assemblers, Linkers, Loaders). A Brief History of Computers |
1 | |
Week 3 - 5 | Machine Instructions and Programs: Part I: Instruction Sets and Machine Programming Models Part II: Memory Locations, Addresses, and Operations Part III: Assembly Language Programming (MIPS) Part IV: The MIPS Instruction Set Architecture |
2 | |
Weeks 6 - 7 | Arithmetic for Computers: Part I: Fixed-Point Arithmetic and Numerical Precision Part II: Floating-Point Arithmetic and the IEEE-754 Standard Part III: Floating-Point Operations: addition, multiplication, and division |
3 | |
Weeks 8 - 10 | The Processor: Part I: Instruction Pipelining Part II: Pipelined Datapaths; Data Forwarding; Hazard Detection; Exceptions Part III: Hazards of Pipelining Revisited |
4 | |
Weeks 11 - 12 | Pipelining: Part I: Instruction Pipelining Part II: Pipelined Datapaths; Data Forwarding; Hazard Detection; Exceptions Part III: Hazards of Pipelining Revisited |
5 | |
Weeks 13 - 14 | Memory Hierarchy: Part I: The Memory Hierarchy Part II: Cache Memory Part III: Virtual Memory |
6 | |
Week 15 | Computer Interfacing Revisited: Part I: Introduction - Buses and I/O Part II: Bus Arbitration Part III: I/O Devices Revisited Part IV: Interrupts Revisited |
7 |
Quiz I | 20% |
Quiz II | 20% |
Assignments | 20% |
Project | 10% |
Final | 30% |
[Apr 9, 2006] Labs will be open for consultation with the instructor each Wednesday from 11:00 a.m. till 1:30 p.m. If you couldn’t get the required consultation at these times in the lab for any reason, you are welcome to directly contact me.
[Apr 9, 2006] Modified project (.pdf) details are now posted with its supporting files (.zip). Each group need to prepare for a presentation to show their findings during the last lab session.
[Apr 9, 2006] Chapters 6 and 7 are posted.
[Mar 25, 2006] Chapter 5 is posted.
[Mar 3, 2006] There will be no classes next week. Extra sessions' dates will be announced later. Labs are running normally.
[Feb 26, 2006] Assignment II is posted.
[Feb 26, 2006] Chapter 4 is posted.
[Jan 31, 2006] Chapter 3 and some solved exercises are posted
[Jan 31, 2006] No problems are assigned from Chapters 1 and 2.
[Jan 8, 2006] Chapters 1 and 2 are posted.
[Jan 8, 2006] Assignment I: The required section from the textbook Logic and Computer Design Fundamentals are 3-3, 3-4, 4-7, 5-7, 6-7, 7-4, 7-10, and 8-5. Your first assessment will include creating VHDL models similar to those presented in these sections with their test benches, so prepare your self for this. (Download samples)
[Jan 7, 2006] If you want to use VHDLSimili from Symphony EDA, from the Symphony EDA Licensing Wizard (Start -> All Programs -> Symphony EDA -> VHDL Simili 2.3 -> License Management) you should activate your free license online. Please note that after installing the package, you must replace the file: symphony.lic, in the directory: C:\Program Files\Symphony EDA\VHDL Simili 2.3\Bin with the file: freelic.txt. In other words, delete the existing symphony.lic, and rename freelic.txt to symphony.lic; make sure the new file is not called symphony.lic.txt!
[Jan 7, 2006] Peter J. Ashenden, VHDL Tutorial, Elsevier Science, 2004.
[Jan 7, 2006]Every student should install QUARTUS+II from Altera (www.altera.com), VHDLSimili (From Symphony EDA), and Xilinx ISE 4.2i (Available with the book:Logic and Computer Design Fundamentals, 3rd edition updated, M. Morris Mano and Charles R. Kime, Prentice Hall, 2004).
[Jan 7, 2006] Welcome to the course website!