1. Course Details

  • Level: Graduates
  • Prerequisite: CCEE 314 - Embedded System Design
  • Lecture Times:  MW 4:30 p.m. – 6:00 p.m.
  • Laboratory: Posted
  • Student Study Hours Per Week: 29
  • Contact Hours Per Week: 3
  • Private Study Hours Per Week: 6
  • AY / Semester:  22005 – 2006 / Fall
  • Professor:  Dr. I. Damaj
  • Contact Details: damajiw@hariricanadian.edu.lb
  • Professor's Website: http://www.idamaj.net
  • Summary of Assessment Method:  1 Midterm, Term paper and project, and a Final
  • Software Packages: C++/Visual C++, MPI Library, VHDL, Verilog, Distributed JAVA.
  • Textbook: Advanced Computer Architecture: Parallelism, Scalability, and Programmability. K. Hwang, McGraw-Hill Computer Science Series, 1993.
  • Reference: David A. Patterson and John L. Hennessy, Computer Organization and Design: the Hardware/Software Interface, Third Edition, Morgan Kaufmann Publishers, 2004. Computer Architecture: A Quantitative Approach, Third Edition, Hennessy and Patterson, Morgan Kaufmann Publishers (Elsevier), 2002. Introduction to Parallel Processing: Algorithms and Architectures. Behrooz Parhami, Plenum 1999. D. Sima, T. Fountain, P. Kacsuk, "Advanced Computer Architectures: A Design Space Approach", Addison Wesley, 1997.

2. Aims of the Course:

This course gives a thorough knowledge in advanced computer architecture concepts, parallel architectures and parallel processing. The main aim is to develop the students’ research skills and knowledge in the state-of-the-art architectures. This topic is strongly related to areas like: computer graphics acceleration, cryptography, coding, hardware design, etc.

3. Short Description:

This course is of 4 giant chapters divided into 15 weeks. The student should be aware of the importance of revising the material synchronously with the lectures. Students should be also aware of the new style of study required in a graduate school. Topics addressed in this course include, but not limited to, instruction-set design, datapath design, pipelining and advanced pipelining techniques, memory hierarchy, parallel computer models, multiprocessors and multicomputers, SIMD/MIMD architectures, superscalar techniques, multithreaded and dataflow architectures, shared memory models, message passing techniques, data-parallel model, parallel languages and compilers, and parallel program development. The assessment is done by 1 midterm (Week 7), a term research paper a project and a final exam.

Details Topic Chapter No. Assessment
Week 1 - 8 Introduction to Computer Architecture
Part I: MIPS Datapath
PartII: Computer Performance
PartIII: Pipelining
Part IV: Cache Memory
Part V: Virtual Memory
1 Assignment (W4)
Term Paper (W7)
Midterm (W8)
Weeks 9 - 10 Performance Revisited and Long-latency Pipelines 2
Weeks 11 - 13 Instruction Level Parallelism and its Dynamic Scheduling 3 Project Proposal (W11)
Weeks 14 - 15 Software Techniques for Exploiting ILP 4 Projects (W15)

5. Assessment of the Course

Midterm 20%
Paper Review 10%
Term Project 15%
Assignments 25%
Final 30%

[Dec 12, 2005] Chapter 4 is posted.

[Dec 5, 2005] Assigned problems: Ch3: 3.1, 3.2, 3.3, 3.5, 3.6, 3.7, 3.9, 3.11, 3.14, 3.15

[Dec 5, 2005] Download Scoreboard example and Appendix G on Vector Processing.

[Nov 14, 2005] Chapter 3 is posted.

[Nov 14, 2005] Assigned problems from Hennessy and Patterson book: Ch1: 1.2, 1.3, 1.7, 1.10, 1.16, 1.17; Ch2: A.2, A.12.

[Nov 1, 2005] The midterm exam is on Monday 7th of November at 4:30 p.m. and it is to be open book, open notes, and the use of laptops with no wireless connection is to be permitted.

[Oct 19, 2005] An extra session is to be held on Monday 31st of October between 11:30 a.m. and 1:30 p.m.

[Oct 19, 2005] There will be no classes next week.

[Oct 14, 2005] An extra session is to be held on Monday 17th of October between 11:30 a.m. and 1:30 p.m.

[Oct 13, 2005] Chapter 2 is posted.

[Oct 4, 2005] There will be an extra session on Friday 7th of October between 3:00 p.m. and 5:00 p.m.

[Oct 4, 2005] There will be no class on Wednesday 5th of October.

[Sep 28, 2005] The assignment due date is changed to Monday 3rd of October at 4:30 p.m.

[Sep 19, 2005] An assignment is posted (due Monday 26th Sept. at 4:30 p.m.)

[Sep 19, 2005] Chapters 2, 4, 5, 6, and 7 are required from the book: David A. Patterson and John L. Hennessy, Computer Organization and Design: the Hardware/Software Interface, Third Edition, Morgan Kaufmann Publishers, 2004.

[Sep 7, 2005] Chapters 1 is posted.

[Sep 7, 2005] If you want to use VHDLSimili from Symphony EDA, from the Symphony EDA Licensing Wizard (Start -> All Programs -> Symphony EDA -> VHDL Simili 2.3 -> License Management) you should activate your free license online. Please note that after installing the package, you must replace the file: symphony.lic, in the directory: C:\Program Files\Symphony EDA\VHDL Simili 2.3\Bin with the file: freelic.txt. In other words, delete the existing symphony.lic, and rename freelic.txt to symphony.lic; make sure the new file is not called symphony.lic.txt!

[Sep 7, 2005] Peter J. Ashenden, VHDL Tutorial, Elsevier Science, 2004.

[Sep 7, 2005] Every student should install QUARTUS+II from Altera (www.altera.com), VHDLSimili (From Symphony EDA), and Xilinx ISE 4.2i (Available with the book:Logic and Computer Design Fundamentals, 3rd edition updated, M. Morris Mano and Charles R. Kime, Prentice Hall, 2004).

© 2015 - Dr. Issam W. Damaj