Dhofar University                                                                  

School of Engineering

Electrical and Computer Engineering Department

 

Digital Systems Design – Course Guide                                                                                                                                   

EECE 220                                                                                  

 

Announcements

 

  
 
1. Course Details:

 

Course Title:

Digital Systems Design

Level

Juniors

Course Reference

EECE 220

Co-requisite

EECE 210

Lectures

SMW 11:00 a.m. - 12:00 p.m.

Room

Q 109

Office Hours

TBA

Student Study Hours Per Week

9

Contact Hours Per Week

3

Private Study Hours Per Week

6

Year and Semester

2008 - 2009 (Fall)

Lecturer

Dr. I. Damaj

Contact Details

i_damaj[@]du.edu.om - Remove the brackets [ ]

Summary of Assessment Method

Quizzes, pop quizzes, assignments, project and presentation, and a final exam

 

Textbook

 

 

 Digital Fundamentals with PLD Programming: 1/e © 2006 | Prentice Hall ISBN-10: 0131701886, ISBN-13: 9780131701885. Thomas Floyd.

Reference

Logic and Computer Design Fundamentals, 3rd edition updated, M. Morris Mano and

Charles R. Kime, Prentice Hall, 2004.

 

Software

MultiSim, Quartus II.

Links

http://academics.idamaj.net 

 
2. Aims of the Course:

 

This course covers the following topics: logic gates, binary number systems, conversion between number systems, Boolean algebra, Karnaugh maps, combinational logic, digital logic design, flip-flops, programmable logic devices (PLDs), counters, registers, memories, and state machines.

 

3. Catalog Description:

 

A course that deals with number systems and codes, combinational circuit analysis, synthesis and practices; minimization methods, sequential logic design principles, latches and flip-flops, synchronous circuits, state machines, and an introduction to VHDL. Co-requisite: EECE 210. Annually.

 

4. Schedule:

 

Details:

Topic

Chapter No.

Assessment

Weeks 1 – 3

Digital Computers and Information

1

 

Weeks 3 – 5

Combinational Logic Circuits

2

  

Weeks 6 – 8

Combinational Logic Design 

3

 Quiz I (Week 8)

Weeks 9 – 11

Combinational Functions and Circuits

4

  

Week 12

Arithmetic Functions and Circuits

5

Quiz II (Week 12)

Week 13 – 16

Sequential Circuits, Registers and Counters

6

Project Due

 
 
5. Assessment of the Course:

 

Attendance

 %5

Pop quizzes, assignments, tutorials, and project

%15

Quiz I

%25

Quiz II

%25

Final

%30

 

Announcements
 
[Nov 1, 2008] Chapter 3 is posted.
 
[Oct 15, 2008] Chapter 2 is posted.
 
[Sep 15, 2008] Chapter 1 is posted.
 
[Sep 13, 2008] Welcome to course website.
 
[Dec 28, 2007] Chapters 5 and 6 are posted.
 
[Dec 1, 2007] Chapter 4 is posted.
 
[Nov 11, 2007] Quiz I is on Thursday, 15 November, 2007 in the engineering building. Exam rooms are to be announced.
 
[Nov 11, 2007] Chapter 3 is posted.
 
[Oct 19, 2007] Chapter 2 is posted.
 
[Sep 15, 2007] Chapter 1 is posted.