**Level:**Juniors**Prerequisites:**CSIS 120 Computer Programming I**Lecture Times:**UTR 09:00 a.m. – 09:50 a.m. (Section 1), UTR 10:00 a.m. – 10:50 a.m. (Section 2)**Classroom:**A 208**Lab Times:**U 03:30 p.m. – 06:30 p.m. (Section 1), U 12:00 p.m. – 03:00 p.m. (Section 2)**Lab:**Digital Systems Laboratory (B 108)**AY / Semester:**2010 – 2011 / Fall**Professor:**Dr. I. Damaj**Contact Details:**idamaj@auk.edu.kw**Course Detailed Site:**http://lms.auk.edu.kw

**Professor's Website:**http://www.idamaj.net

**Summary of Assessment Method:**2 quizzes, pop quizzes, assignments, lab experiments, project and presentation, and a final exam

**Textbook:**Digital Design, 4th edition, M. Mano and M. Ciletti, Pearson International Edition, 2007.

**Software Tools:**MultiSim, Quartus II, and Debug Assembler

**References:**Digital Fundamentals with PLD Programming: 1/e 2006, Prentice Hall, Thomas Floyd.

Number systems and codes, Boolean algebra, minimization methods, combinational circuit design and analysis, arithmetic blocks, programmable logic, latches and flip-flops, sequential logic design, state machines, registers, counters, memory elements, logic synthesis, high-level synthesis, an introduction to VHDL. A lab component is included in this course. Prerequisite: CSIS 120 Computer Programming I; 4 Credit hours.

- Apply number system conversions, typically related to binary system
- Simplify Boolean expressions using basic theorems and properties of Boolean Algebra
- Apply gate-level minimization techniques
- Design combinational arithmetic and logic circuits
- Design synchronous sequential logic circuits
- Use Registers and Counters
- Implement Logic Circuits using Programmable Logic Devices
- Understand basic memory organization

Details | Topic | Chapter No. | Assessment |
---|---|---|---|

Week 1 - 3 | Digital Systems and Binary Numbers | 1 | |

Weeks 3 – 4 | Boolean Algebra and Logic Gates | 2 | |

Weeks 4 – 5 | Gate-level Minimization | 3 | Quiz I (Week 6) |

Weeks 6 – 7 | Combinational Logic | 4 | |

Week 8 - 11 | Synchronous Sequential Logic | 5 | Quiz II (Week 11) |

Week 12 - 13 | Registers and Counters | 6 | |

Week 14 - 15 | Memory and Programmable Logic | 7 | Project Due |

- Basic Logic Gates, Sum of Products, and Product of Sums
- Technology Mapping to NAND Gates
- Combinational Circuits (Adders, Comparators, etc.)
- Latches and Flip-Flops
- Registers and Counters
- Timing Circuits

**Mini Project: **Applications using 7-Segment Displays

**Experiment Pattern: **Software Simulation (HDL and/or Schematic) and Hardware Implementation

Attendance | 5% |

Pop quizzes and assignments | 5% |

Quiz I | 15% |

Quiz II | 20% |

Laboratory | 25% |

Final | 35% |